It used to be received wisdom that the way to get a good design flow was for a semiconductor company to purchase best-in-class point tools and then integrate them together themselves. I think there were two reasons for this. First, the EDA companies had grown from a lot of acquisitions so that’s what they had for sale: good point tools that were poorly integrated. Second, they were selling to CAD groups in an era when semiconductor was doing well and CAD groups liked to justify their existence by doing lots of evaluation (which point tool is best?) and then integrating them (need lots of people).
For most people, this was actually not the best way to get a productive environment matched to their needs. It is as if we all had to buy cars the way a Formula-1 team does, buying the best engine, the best brakes, the best gearbox and making everything work well together ourselves at great expense. If you really need to win a Formula-1 race then this is the only way to go. Even a top of the line Ferrari is simply way too slow. But for most of us, a Honda Accord is just fine, easier to use, cheaper to acquire, and orders of magnitude less expensive to get and keep on the road.
Back in that era I was at VLSI Technology. When we spun out Compass we had a Honda Accord in a marketplace where people thought they wanted to build their own Formula-1 racecar. Potential customers only wanted to benchmark point tools and wouldn’t even attempt to benchmark an entire design flow. I’m not even sure how you would. I don’t know how much better the design flows that CAD groups assembled out of Cadence and Synopsys point tools (along with a seasoning of stuff from startups) really were. And neither does anyone else. They were certainly incredibly expensive in comparison. Before the spinout, I made several visits to semiconductor companies whose CAD groups were bigger than VLSI’s Design Technology group. But Design Technology developed all the tools, wrote all the source code for synthesis, simulation, timing analysis, place and route, physical verification, designed all the standard cell libraries, created the memory compilers and the datapath compiler. Soup to nuts. I think the only external tool in wide use was for gate-array place and route, an area where VLSI was never that competitive anyway (if you really wanted a gate-array, you went to LSI Logic).
Magma was the first and only EDA company to build an integrated environment. A CAD manager friend of mine told me that they used Magma for everything they could. For the most difficult designs they used Cadence’s Silicon Ensemble but they could train someone on Magma in a day (and they weren’t immediately hired away by the competition once they’d been expensively put through training).
At the EDAC forecast meeting a couple of weeks ago, Aart de Geus said he has been preaching that an integrated flow is important for years. One difference he is noticing in the current downturn, he said, is that this time executives are listening. Chi-Ping Hsu of Cadence told me the same thing about the Cadence PFI initiative which was well-received by power-sensitive customers (is there another sort of customer?). PFI’s main thread, the CPF standard, pulled together tools from across Cadence’s product line along with standards that allowed external tools to play in the flow too. Synopsys UPF does the same thing on their side of the standard wars trench. People had managed to put together power-aware flows before, lashing together point tools with lots of their own scripts. But they were very buggy and many chips failed due to trivial things like missing isolators or not taking getting the timing right in multi-voltage blocks. This seems to be a thing of the past now, although most designs are still on the basic end of power saving (fixed voltage islands, power-down) and not yet attempting the really tricky things like dynamic voltage and frequency scaling (lowering the voltage and slowing the clock when there is not much to do).
In the current hyper-cost-sensitive environment I think that the pendulum will swing back the other way towards these more pre-integrated flows and away from the integrate-your-own-point-tools approach. It is also the only way that complex factors like power, that cut across the whole design flow, can be accommodated. The slowing of startup acquisitions by the majors feeds into this, giving them time to put the effort into integration without constantly gaining more things to integrate. The integration has enormous value despite the fact that customers have been historically reluctant to pay vendors for it. When I was at Cadence we had some research showing customers spent $3 or so on integration for every $1 that Cadence got. So customers were paying for it, just not externally.
Not exactly on-topic, but you can actually see a Formula-1 car race a Ferrari and a Fiat.