EDAC forecast panel

The annual EDAC CEO forecast meeting was last week. For a change, Synopsys had just reported their results earlier and so were not in their quiet period. Unfortunately, Wally had just entered his quiet period so, as he put it, he was only allowed to talk about the past.

First up was Lip-Bu of Cadence, who started out by wearing his venture-capitalist hat. He said that VCs were not finding any semiconductor companies to invest in right now. The economics are that it takes $100M to get a start of the art SoC into production, you need to sell 80M units to amortize all the costs and the chance of profit is low. Not exactly a compelling elevator pitch. It’s all about the profit was his message: the 90s was the decade of point-tools, the 2000s the decade of platforms and 2010s are the decade of profitability.

Wally was up next and instead of his usual slides predicting the future, we only had slides predicting the past. In particular, pointing out how accurate he had been in his predictions from last year.

John Kibarian of PDF solutions was up next. His slides said explicity “Confidential. Any reproduction prohibited,” which was funny in a public forum. I once made the same error presenting to IBM. They stopped the presentation and said they couldn’t look at the presentation if it was company confidential. John’s connection to fabs gave him a perspective on how bad the downturn had been. In early 2009 fab utilization averaged 30%, customers were cutting back orders by a factor of 10. However, utilization has popped back up quickly. TSMC is planning a capital investment of $4.8B in 2010, their largest ever.

To him the big interesting question in his space is which flavor of 28nm will win, especially in terms controlling variability. In the blue corner, gate-first; in the red-corner gate-last; and, mixing my metaphors, this is a 3 horse race and polysilicon is still in the running. Gate-first, which seems to be the IBM approach, is the most like current processes, but the gate has to be able to withstand the 1000°C processing needed after ion implantation. Gate-last, which is what Intel does, is actually gate first and last. A conventional self-aligned sacrificial polysilicon gate is built (although with totally different dielectric) and then finally is removed and replaced with metal. John reckons that by the time these processes actually get to volume manufacturing they will be much more similar than they currently seem.

Aart was next up and he thinks we’re at an inflexion point where we are moving from scale complexity, basically Moore’s law, to systemic complexity (IP, chip, board, software etc).

Then it was question time. Jay Vleeshhouwer, the moderator, asked a lot of questions. So many that by the time he threw them open to the floor about 10 minutes after everything was meant to have finished we’d were all ready to go home. The most interesting question was about how semiconductor consolidation would affect EDA. The cost of developing a process (TD in the lingo of semi companies) is $1-1.5B and then $3-5B for a fab to run it in. So there has been a lot of consolidation around a small number of processes, and a lot of companies moving to fables or fab-lite models (except for memory). Fewer processes is good for EDA since each one is expensive to support.

Wally pointed out that semiconductor is not consolidating despite things like Renasas and NEC. The market share of the #1 semiconductor company is the same today as 35 years ago (when it was TI, before passing the baton to NEC who passed it to Intel). Market share of the top 5 is less than 35 years ago, top 10 the same. And 2008 was the first year that a fables semiconductor company, Qualcomm, was in the top 10. EDA is not consolidating either, despite all the little mergers. The market share of the big 3 has been unchanged for 10 years.

Despite Lip-Bu’s early comment about not funding fabless companies, it seems that in 2008 it was down. But only to 80% of the long-run average, which seems surprisingly high. Wally also pointed out that churn is good for EDA. When a fabless company goes out of business the engineers pop up again soon at other companies. But the licenses die and the new companies need to re-invest.

Lip-Bu pointed out that this year 10-12 semiconductor companies should go public and that he thinks VC will swing back. I’m getting a mixed message here. Spinoff activity is also increasing.

Jay next asked where the next big $100M market would come from, in the same way as RET went from $0 in 1999 and is now close to $200M. Aart pointed out that if it was obvious everyone would be investing heavily in it and there would be 30 startups in the area. There is a major aspect of serendipity in these things.

Finally, acquisitions. Aart said that the best acquisitions are things that are not to close and not too far from what you do already. If they are too far then little synergy, too close and too much overlap. Wally agreed and pointed out that recessions are a time of opportunity since you can do deals that might not get done in sunnier times. But he warned that if you take the #3 company in a space and merge it with the #5 company, you are much more likely to end up with the #7 company than the #2 company.

And with that it was time to fill in our predictions for the stock prices for next year. I forgot to hand my card in but I guess 8 for Cadence, that Magma would no longer be independent, 11 for Mentor, MIPS would no longer be independent, and 27 for Synopsys. But if I could do this stuff well then I’d be much richer than I am.

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