Super-models

I wrote earlier in the week about open source software in EDA, or rather about the lack of it. One area where there is some free and open source software, as well as closed source software, is on that boundary between EDA for chips and software tools for embedded systems, namely what seem to be called virtual platforms or virtual prototypes (I hate the name “virtual prototype” since it is a chip-centric view of the world implying that the platform is useless once the chip shows up).

Virtual platforms, while they have some utility for chip development, are largely sold to software developers to allow them to do software development more productively and earlier than would be the case if they had to use the real hardware, which comes along too late and is too opaque. The performance of the virtual platforms is almost unbelievably high, running ARM or PowerPC code binaries at hundreds of MIPS on an off-the-shelf PC, often similar to the performance on the actual hardware.

I have worked for both VaST Systems Technology and Virtutech who both supply tools into this market. They charge per seat in the region of $5-25K/seat/year. In the IC design world these price point are low; in the software development world they are very high. Synopsys with its Virtio acquisition is also in this market. Imperas is a startup founded by Simon Davidmann in the UK to enter this market specifically to address the difficulty of programming multicore chips. Driven by a mixture of lack of funding but also a deliberate change of strategic direction, about a year ago they made their environment free and created Open Virtual Platforms (OVP).

Blue Ocean StrategyI met Simon at DATE last year where this was announced, and asked him why he did it. Firstly, he said that he is a big fan of Kim and Mauborgne’s Blue Ocean Strategy, changing the rules and competing where the competition isn’t. But the thing that really brought it home was discovering a fact about QEMU. QEMU is a similar type of simulator developed largely by one person, Fabrice Bellard, and distributed free (and open source). The fact Simon discovered is that QEMU has more Google hits than Synopsys.

qemuThink about that for a moment: a single free product that most of you have never heard of in a neighboring space to IC design has more web references than the EDA market leader has for all their products put together (they are almost identical at around 1.7M apiece when I looked just now).

Simon also realized that companies made more money from verification tools around simulators than selling the simulators themselves. So for Imperas the key would be to get people using the simulator so that there was a base into which to sell higher value tools. It is too soon to tell whether the strategy is working fully, but MIPS and Tensilica are both distributing models on the OVP foundation.

When I was at VaST and Virtutech it was clear to me that the market would be limited so long as models were not being supplied by the component vendors, either at the same time as or in advance of silicon. I always used the analogy of Synopsys in the early days. At first Synopsys themselves developed the ASIC vendor libraries necessary for synthesis. Bob Dahlberg, who ran the group, told me that at one point he had well over 100 people doing this. Then the ASIC vendors realized that it was their job if they wanted the job done how they wanted it done when they wanted it done. A year later Synopsys disbanded the group completely since ASIC vendors had completely taken over the task.

This is starting to happen in the automotive industry around VaST’s technology, For some time the main suppliers into the automotive industry (NEC, Renasas, Infineon, Freescale and others) have supplied processor models for VaST’s environment. NEC America is announcing today that they will be distributing complete virtual platforms on VaST’s foundation technology into the automotive industry, going beyond simply providing processor models. Software engineers in tier-1 suppliers (automotive-speak for people like Delphi, Visteon and Denso) and OEMs (automotive-speak for car companies like GM, BMW and Toyota) will be able to develop their software without having to wait for silicon to be available and in a much more productive environment than the real electronic control unit that will eventually ship in the cars.

However, I think that component suppliers will continue to remain reluctant to develop models for the virtual platform ecosystem while there are limited standards for interoperability or, as an alternative, a de facto winner in the same way as Synopsys was clearly the early winner in synthesis. Even a company like Freescale, which distributes VaST models into the automotive industry also distributes Virtutech models into the communication (think router and base-station) industry, which is clearly not optimally productive.

iPhone simulatorThe situation where OVP, VaST, Virtutech, Virtio, QEMU, Bochs and others all have incompatible virtual platform environments is not really sustainable. SystemC provides some standardization around modeling of peripheral devices where performance is not critical, but processor models depend heavily on the underlying simulation technology to get their blazing performance.

The other alternative is native cross-compilation environments. If you develop software for the iPhone Apple supplies a Mac-based iPhone simulator. It is fast but people complain about its accuracy especially for graphics. But presumably Apple decided it was not worth using true virtual platform to get the accuracy at some loss of performance, or maybe they didn’t even know just how fast simulation technology can be. Also, it is not so much iPhone application software but the call processing and low level software that absolutely requires a high accuracy platform.

It will be interesting to see how this all plays out.

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