ESL and software signoff

The DAC newsletter had a recent article on the ESL market. Gary Smith pointed out that one of the reasons that Cadence is struggling is that the fastest growing part of the market has been ESL, the most advanced design groups are using more and more ESL tools and Cadence has no offering in that space (although they have now introduced their CtoRTL product). Of course Gary is famous for predicting the last 5 booms in ESL but this time I think he might be right.

However, I think the problem may be worse than this, from an EDA perspective. The most advanced design groups such as Nokia and Apple, aren’t designing much at even the ESL level. Nokia has transferred its semiconductor design group to ST. Apple didn’t do much (any?) semiconductor design, as far as I know, in the iPhone and what they did in the iPod was subcontracted to eSilicon and PortalPlayer. The differentiation in most electronic systems is now in the software. But EDA companies can’t say this too loudly even if they realize it, since the bulk of their money comes from semiconductor designers.

The opportunity for EDA would be to expand to encompass the entire design process, at the very least the semiconductor, board, software subsystem, even if not the mechanical and manufacturing part. But nobody knows how to make money at this. It is probably a consulting business and it is quite possible that the current downturn will throw up someone who can put the pieces together. I’d bet on someone like PTC or Dassault rather than Synopsys or Cadence to do this though. They already see the bigger picture.

One missing link is modeling. To do software design for electronic products requires a model of the electronics, and it is hard to produce that automatically. As more transactional level SystemC modeling is done, and as technology from companies like Carbon improve, the models thrown off as a by-product of the semiconductor deign process are starting to be much more useful for this. ARM are switching to using automatically generated Carbonized models instead of writing their own cycle-level accurate models going forward, for example.

This moves us closer to what I call “software signoff” where the electronic design process becomes very software-centric. The purposes of semiconductors and microprocessors are simply to run the software fast enough and at low enough power to make the end-product successful. The underlying technology to do this is some mixture of high-level C/C++ synthesis, IP blocks, automatic assembly of peripherals, buses and device- drivers, modeling to link the hardware and software. In short, what we call ESL. But the perspective is a bit different. The purpose of software signoff is not to produce a chip for people to program, but rather to accelerate a software implementation with very little effort. Once the software implements what you need, it should be pushbutton (or at least fairly automatic) to build a chip or to map the software onto an existing platform.

I took a dig at Gary Smith for being early predicting huge growth for ESL, but I can remember preaching about software in semiconductor companies when I was at VLSI over a decade ago. So I was even further ahead of reality in predicting the move of differentiation to software.

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