Category Archives: methodology

Multicore

Earlier I discussed power in integrated circuits. As most people know, power is the main reason that PC processors have had to move away from single core chips with increasingly fast clock rates and towards multi-core chips. Embedded chips are … Continue reading

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Power again

Yesterday I promised an overview of what power reduction techniques are out there. First, a disclosure: I was interim CEO of Envis for about a year and I’ve done some consulting for Nanochronous. Firstly, there are two kinds of power: … Continue reading

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Power is the new timing

In the 1980s, chip design was focused on layout: cramming all those gates into as few chips as possible, trying make use of every square millimeter of silicon. The 1990s were the decade of timing, when all the tools became … Continue reading

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Ferrari vs Formula-1

It used to be received wisdom that the way to get a good design flow was for a semiconductor company to purchase best-in-class point tools and then integrate them together themselves. I think there were two reasons for this. First, … Continue reading

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The arrogance of ESL

ESL, or electronic system level design, is a catchall term for tools above the level of RTL. There are two primary aspects to this: synthesis and verification of IC designs from representations higher than RTL (usually untimed C or System-C); … Continue reading

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Groundhog day

It’s Groundhog Day today. You’ve probably seen the movie Groundhog Day (netflix) in which the Bill Murray self-centered weatherman character is stuck in a time warp, waking up every morning to exactly the same day until, after re-examining his life, … Continue reading

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