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Author Archives: paulmcl
3D chips: IBM server
The opening keynote of the 3D conference that I went to was by Subramanian Iyer of IBM. He described work they were doing on fully 3D chips for servers. The approaches I’ve already talked about don’t really work for the … Continue reading
Posted in methodology, semiconductor
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2½D: interposers
There are two classes of true 3D chips which are being developed today. The first is known as 2½D where a so-called silicon interposer is created. The interposer does not contain any active transistors, only interconnect (and perhaps decoupling capacitors), … Continue reading
Posted in methodology, semiconductor
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Going up: 3D ICs and TSVs
This is the first of several posts about 3D ICs. I attended the 3D architectures for semiconductor integration and packaging conference just before Christmas. I learned a lot but I should preface any remarks with the disclaimer that I’m not … Continue reading
Posted in methodology, semiconductor
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Variation-aware Design
Solido has run an interesting survey on variation-aware design. The data is generic and not specific to Solido’s products although you won’t be surprised to know that they have tools in this area. What is variation-aware design? Semiconductor manufacturing is … Continue reading
Posted in methodology, semiconductor
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Magma’s new P&R and re-building the foundations
One of the important but often unrecognized aspects of engineering is re-building the infrastructure underneath key design tools. Sometimes this gives a new desirable capability but often a lot of the effort is simply to modernize the code base so … Continue reading
Posted in eda industry, engineering
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Carbon
In the latest piece that Jim Hogan and I put together about re-aggregation of value back at the system companies I talked a little bit about Carbon. I got two things wrong, that I’d like to correct here. The first … Continue reading
Posted in eda industry, methodology
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Windows on ARM?
In a blog post last March I concluded: My gut feel is that a mobile-internet-device will be more like a souped up smartphone than a dumbed down PC, and so Atom will lose to ARM. In fact I think the … Continue reading
Posted in semiconductor
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Evolution of design methodology, part II
The second half of the article that Jim Hogan and I wrote on re-aggregation of design at the system companies is now up at EEtimes. The second part of the article looks at the implications for the EDA and IP … Continue reading
Posted in eda industry, methodology
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Pat Pistilli: the first cell library, the first printed label, and more
Pat Pistilli is this years Kaufman Award winner. I was out of the country for the award dinner so I didn’t attend but I talked to Pat earlier today. Pat, who was at Bell Labs, started DAC (then called SHARE, … Continue reading
Posted in eda industry, engineering
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30th Anniversary of Funding of VLSI Technology
Doug Fairbairn reminds me that today is the 30th anniversary of the funding of VLSI Techology. VLSI was really the first company to embrace the idea that integrated circuits could be designed by people outside the priesthood of the semiconductor … Continue reading
Posted in eda industry, investment, semiconductor
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